50-nm fully depleted SOICMOS technology with HfO2 gate dielectric and TiN gate

被引：13

作者：

Vandooren, A ^{[1
]}

Egley, S ^{[1
]}

Zavala, M ^{[1
]}

Stephens, T ^{[1
]}

Mathew, L ^{[1
]}

Rossow, M ^{[1
]}

Thean, A ^{[1
]}

Barr, A ^{[1
]}

Shi, Z ^{[1
]}

White, T ^{[1
]}

Pham, D ^{[1
]}

Conner, J ^{[1
]}

Prabhu, L ^{[1
]}

Triyoso, D ^{[1
]}

Schaeffer, J ^{[1
]}

Roan, D ^{[1
]}

Nguyen, BY ^{[1
]}

Orlowski, M ^{[1
]}

Mogab, J ^{[1
]}

机构：

[1] Motorola Inc, Adv Prod Res & Dev Lab, Austin, TX 78721 USA

来源：

IEEE TRANSACTIONS ON NANOTECHNOLOGY | 2003年 / 2卷 / 04期

关键词：

fully depleted SOI; high-k dielectric; metal gate; raised SD extension;

D O I：

10.1109/TNANO.2003.820502

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, we demonstrate for the first time CMOS thin-film metal gate FDSOI devices,using HfO2 gate dielectric at the 50-nm physical gate length. Symmetric V-T is achieved for long-channel nMOS and pMOS devices using midgap TiN single metal gate with undoped channel and high-k dielectric. The devices show excellent performance with a I-on = 500 muA/mum and I-off = 10 nA/mum at V-DD = 1.2 V for nMOSFET and I-on = 212 muA/mum and I-off = 44 pA/mum at V-DD = -1.2 V for pMOSFET, with a CET = 30 Angstrom and a gate length of 50 nm. DIBL and SS values as low as 70 mV/V nand 77 mV/dec, respectively, are obtained with a silicon film thickness of 14 nm. Ring oscillators with 15 ps stage delay at V-DD = 1.2 V are also realized.

引用

页码：324 / 328

页数：5

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