DIBL enhancement in ferroelectric-gated FinFET

被引：9

作者：

Cho, Hyungki ^{[1
]}

Shin, Changhwan ^{[2
]}

机构：

[1] Univ Seoul, Elect & Comp Engn, Seoul, South Korea

[2] Sungkyunkwan Univ, Elect & Comp Engn, Suwon, South Korea

来源：

SEMICONDUCTOR SCIENCE AND TECHNOLOGY | 2019年 / 34卷 / 02期

基金：

新加坡国家研究基金会;

关键词：

DIBL; FinFET; NC-FinFET; NEGATIVE CAPACITANCE; VOLTAGE;

D O I：

10.1088/1361-6641/aaf518

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Drain-induced-barrier-lowering (DIBL) is one of short-channel-effects (SCEs) of conventional field effect transistors (FET), which results in lowering the threshold voltage of short-channel transistors. To properly control the DIBL of FinFETs, it is well known that the fin width of the FinFET can be adjusted (usually, a narrower fin width to enhance gate-to-channel coupling). In this work, the fin width effect of FinFETs (vs. ferroelectric-gated FinFETs, a.k.a., negative capacitance (NC) FinFETs) on the DIBL has been investigated and compared. As a result, it is experimentally verified that the NC-FinFET has superior gate-to-channel controllability and better subthreshold swing due to the negative capacitance effect of ferroelectric capacitor.

引用

页数：5

共 22 条

[1] Designing 0.5 V 5-nm HP and 0.23 V 5-nm LP NC-FinFETs With Improved IOFF Sensitivity in Presence of Parasitic Capacitance [J].