Current Harmonic Reduction of DC-Link Capacitor in Dual Motor Drive System

被引:0
作者
Yan, Hao [1 ]
Buticchi, Giampaolo [1 ]
Gerada, Chris [1 ]
Marquez, Abraham [2 ]
Leon, Jose I. [2 ]
Liserre, Marco [3 ]
机构
[1] Univ Nottingham Ningbo China, Fac Sci & Engn, Ningbo, Peoples R China
[2] Univ Seville, Dept Elect Engn, Seville, Spain
[3] Univ Kiel, Chair Power Elect, Kiel, Germany
来源
45TH ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY (IECON 2019) | 2019年
基金
中国国家自然科学基金;
关键词
Current harmonic reduction; dc-link capacitor; dual PMSM system; phase shift; CONVERTER; ALGORITHM; POWER;
D O I
暂无
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
In Electric Vehicle (EV) application, the in-wheel motors are driven by the same dc-link voltage. To reduce the space, the Voltage Source Inverters (VSIs) can share one dclink capacitor. Long-term experiences and experimental data demonstrate that the capacitors are one of the major failures in the motor drive system. The current profile of the dc-link capacitors is the main factor for this degradation, therefore, by reducing the current harmonic components of the dc-link capacitors can increase the lifetime. In this paper, a dc-link capacitor current harmonic reduction method for dual Permanent Magnet Synchronous Motor (PMSM) drive system in EV application is proposed. The Phase Shift Pulse Width Modulation (PSPWM) is employed in the dual inverters to reduce the harmonic components of dc-link capacitor. To verify the proposed method, a experimental platform is established and the experimental results are presented.
引用
收藏
页码:3148 / 3153
页数:6
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