A 1-1-1-1 MASH Delta-Sigma Modulator Using Dynamic Comparator-Based OTAs

被引:0
|
作者
Yamamoto, Kentaro [1 ]
Carusone, Anthony Chan [1 ]
机构
[1] Univ Toronto, Dept Elect & Comp Engn, Toronto, ON M5S 1A1, Canada
来源
2011 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC) | 2011年
关键词
PIPELINED ADC; CMOS; MS/S;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 1-1-1-1 MASH delta-sigma modulator with dynamic comparator-based OTAs as replacements for conventional OTAs is presented. The proposed OTA asynchronously alternates between input comparison and current pulse injection under digital control. The 65-nm LP CMOS prototype achieves a FoM of 276 fJ/conv-step with 70.4 dB SNDR over a 2.5-MHz bandwidth while consuming 3.73 mW from a 1.2-V supply.
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页数:4
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