A 24 Gb/s software programmable analog multi-tone transmitter

被引：31

作者：

Amirkhany, Amir ^{[1
,2
]}

Abbasfar, Aliazam ^{[1
]}

Savoj, Jafar ^{[1
]}

Jeeradit, Metha

Garlepp, Bruno ^{[1
]}

Kollipara, Ravi T. ^{[1
]}

Stojanovic, Vladimir ^{[3
]}

Horowitz, Mark ^{[1
,2
]}

机构：

[1] Rambus Inc, Los Altos, CA 94022 USA

[2] Stanford Univ, Dept Elect Engn, Stanford, CA 94305 USA

[3] MIT, Dept Elect Engn, Cambridge, MA 02139 USA

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2008年 / 43卷 / 04期

关键词：

decision feedback equalizers; equalizers; frequency division multiplexing; high-speed circuits; MIMO systems;

D O I：

10.1109/JSSC.2008.917520

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 24 Gb/s transmitter employs a digital linear equalizer and a 12 GS/s 8-bit digital-to-analog converter (DAC). Implemented in a 90 nm CMOS technology, the transmitter can be programmed to support a variety of communication modes including 4-channel and 2-channel analog multi-tone (AMT), as well as various baseband (BB) modes ranging from 2 to 256 PAM. Selection of the transmission mode is enabled through software programming of the appropriate tap coefficients into the equalizer. The transmitter dissipates 510 mW of power and is fabricated over an area of 0.8 mm(2). Experimental results confirm clear eye diagrams at 28 Gb/s.

引用

页码：999 / 1009

页数：11

共 16 条

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