Petri net-based specification, analysis and synthesis of logic controllers

被引：0

作者：

Wegrzyn, A ^{[1
]}

Wegrzyn, M ^{[1
]}

机构：

[1] Tech Univ Zielona Gora, Dept Comp Engn & Elect, PL-65246 Zielona Gora, Poland

来源：

PROCEEDINGS OF THE 2000 IEEE INTERNATIONAL SYMPOSIUM ON INDUSTRIAL ELECTRONICS, VOL 1 AND 2 | 2000年

关键词：

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

The logic control program is usually specified by drawing the Petri net in terms of interface with the electro-mechanical devices and the environment of the system. In such case it is not immediately evident that the control system behaves in a satisfactory way. Industrial engineers prefer frequently a form of specification, like interpreted Petri Net, Sequential Function Chart (SFC), Grafeet or Grafehart. In opposite, some popular techniques are informal and do not provide means to validate the design. In the paper, modelling, analysis and synthesis of logic controller described by Petri nets is presented. Additional, the use of Design/CPN system for modelling, testing and analysis of logic controllers described by means of coloured, interpreted Petri nets is shown. The proposed methods are especially use I in designing of Industrial Application Specific Lo Controller (ASLC) with FPGA.

引用

页码：20 / 26

页数：3

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