An audio ADC delta-sigma modulator with 100-dB peak SINAD and 102-dB DR using a second-order mismatch-shaping DAC

被引:35
作者
Fogleman, E [1 ]
Welz, J [1 ]
Galton, I [1 ]
机构
[1] Univ Calif San Diego, Dept Elect & Comp Engn, La Jolla, CA 92093 USA
基金
美国国家科学基金会;
关键词
analog-digital conversion; CMOS analog; integrated circuits; delta-sigma modulation; digital-analog conversion; dynamic element matching; mixed analog-digital integrated circuits;
D O I
10.1109/4.910472
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A second-order audio analog-to-digital converter (ADC) Delta Sigma modulator using a second-order 33-level tree-structured mismatch-shaping digital-to-analog converter (DAC) is presented. Key logic simplifications in the design of the mismatch-shaping DAC encoder are shown which yield the lowest complexity second-order mismatch-shaping DAC known to the authors. The phenomenon of signal-dependent DAC noise modulation in mismatch-shaping DACs is illustrated, and a modified second-order input-layer switching block is presented which reduces inband DAC noise modulation by 6 dB, Implementation details and measured performance of the 3.3-V 0.5-mum single-poly CMOS prototype are presented. All 12 prototype devices achieve better than 100-dB signal-to-noise-and-distortion and 102-dB dynamic range over a 10-20 kHz measurement bandwidth.
引用
收藏
页码:339 / 348
页数:10
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