Signal integrity analysis of a high precision D/A converter

被引：0

作者：

Valorge, Olivier ^{[1
]}

Marche, David ^{[1
,2
]}

Lacourse, Alain ^{[2
]}

Sawan, Mohamad ^{[1
]}

Savaria, Yvon ^{[1
]}

机构：

[1] Ecole Polytech, Dept Elect Engn, Montreal, PQ H3C 3A7, Canada

[2] LTRIM Technol Inc, Laval, PQ H7V4B4, Canada

来源：

2007 14TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-4 | 2007年

基金：

加拿大自然科学与工程研究理事会;

关键词：

electromagnetic compatibility; substrate noise; power/ground noise; ICEM; D/A converter; ESD;

D O I：

10.1109/ICECS.2007.4511217

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The purpose of this paper is to investigate the significance of different coupling mechanisms that occur in a high precision D/A converter. The standard Integrated Circuit Emission Model approach is applied to an existing D/A converter built in TSMC CMOS 0.25 mu m technology. Aggressors, propagation media and victim are defined and modelled using classical CAD tools. Potential noise sources and victims are identified and some frequency and time domain simulation results reveal the noise source signatures. This study highlights the main noise source in such kind of converters: the charging/discharging switch current that occur at each sampling period. Based on detailed simulations, the 60mV peak to peak voltage glitch observed on the output is explained by power and ground ringing due to current switches, whereas previous studies suggested that such glitches were due to substrate coupling. The simulated substrate propagated digital glitches have a peak to peak voltage of 5mV, and are more than ten times lower than glitches induced by the current switch activities.

引用

页码：1224 / +

页数：2

共 9 条

[1]

*AN DEV, EV HIGH SPEED DAC PE

[2] Noise generation and coupling mechanisms in deep-submicron ICs [J].

Aragonès, X ;

González, JL ;

Moll, F ;

Rubio, A .

IEEE DESIGN & TEST OF COMPUTERS, 2002, 19 (05) :27-35

[3]

*IEC, 2002, 61927 IEC

[4]

LAHOZ T, 2005, P IEEE ISCAS 2005 KO

[5] A novel laser trimming technique for microelectronics [J].

Meunier, M ;

Gagnon, Y ;

Savaria, Y ;

Lacourse, A ;

Cadotte, M .

APPLIED SURFACE SCIENCE, 2002, 186 (1-4) :52-56

[6]

VALORGE O, 2007, P ISCAS 2007 NEW ORL

[7]

VALORGE O, 2006, IEEE T CIRCUIT S OCT, V1

[8]

VRIGNON B, 2004, P EMC COMP 04 ANG FR

[9]

FASTHENRY FASTCAP

← 1 →