Influence of gate and drain bias on the bias-stress stability of flexible organic thin-film transistors

被引：0

作者：

Bisoyi, Sibani ^{[1
]}

Tiwari, Shree Prakash ^{[1
]}

Zschieschang, Ute ^{[2
]}

Klauk, Hagen ^{[2
]}

机构：

[1] Indian Inst Technol Jodhpur, Ctr Informat & Commun Technol ICT, Jodhpur 342011, Rajasthan, India

[2] Max Planck Inst Solid State Res, Organ Elect Grp, D-70569 Stuttgart, Germany

来源：

2014 IEEE 2ND INTERNATIONAL CONFERENCE ON EMERGING ELECTRONICS (ICEE) | 2014年

关键词：

Bias-stress; organic TFTs; 10%-current-decay lifetime; flexible substrate; FIELD-EFFECT TRANSISTORS; AMOLED DISPLAY; DRIVEN; SEMICONDUCTOR;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, the influence of gate-source and drain-source bias on the bias-stress stability and lifetime of pentacene-based low-voltage (-3 V) organic thin-film transistors (TFTs) built on plastic substrate has been investigated. The 10%-current-decay lifetime is used for analyzing the influence of applied bias on the bias-stress stability of TFTs, and to compare various biasing conditions. Our results show a 3 to 4 times higher 10%-current-decay lifetime when magnitude of gate-source and drain-source voltage are equal and less than 2.5 V during bias stress, compared to that when drain-source voltage is kept at -3.0 V.

引用

页数：4

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