Post SiN etching cleaning during copper and low K integration

被引:3
作者
Beverina, A
Louis, D
Arvet, C
Lajoinie, E
Besson, P
Peyne, C
Holmes, D
Maloney, D
Lee, S
Lee, WM
机构
[1] ST Microelect, FR-38926 Crolles, France
[2] CEA Grenoble, Gressi Leti, FR-38054 Grenoble 09, France
[3] EKC Technol Inc, Hayward, CA 94545 USA
来源
ULTRA CLEAN PROCESSING OF SILICON SURFACES 2000 | 2001年 / 76-77卷
关键词
cleaning; copper (Cu); low K;
D O I
10.4028/www.scientific.net/SSP.76-77.101
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
This work shows an analysis of interconnect cleaning after SiN etching step for low-k / copper integration. Analytical data from ToF-SIMS, AES and FiB-TEM are combined to understand the mechanism and efficacy of available cleaning chemistries in the presence of Cu and organic (SiLK) or Si-based (Silane oxide) dielectric materials. the use of two different solutions, working on two different approaches (low and high pH), is evaluated: diluted HF and commercially available EKC525.
引用
收藏
页码:101 / 104
页数:4
相关论文
共 4 条
[1]  
LOUIS D, 1999, IITC, P99
[2]  
MOREY I, 1999, SOLID STATE TECH JUN
[3]  
PETERS L, 1998, SEMICONDUCTOR IN SEP
[4]  
TARDIF F, ECS 196 M