Warpage and Thermal Characterization of Fan-Out Wafer-Level Packaging

被引：81

作者：

Lau, John H. ^{[1
]}

Li, Ming ^{[1
]}

Tian, Dewen ^{[1
]}

Fan, Nelson ^{[1
]}

Kuah, Eric ^{[1
]}

Kai, Wu ^{[1
]}

Li, Margie ^{[1
]}

Hao, J. ^{[1
]}

Cheung, Yiu Ming ^{[1
]}

Li, Zhang ^{[2
]}

Tan, Kim Hwee ^{[2
]}

Beica, Rozalia ^{[3
]}

Taylor, Thomas ^{[3
]}

Ko, Cheng-Ta ^{[4
]}

Yang, Henry ^{[4
]}

Chen, Yu-Hua ^{[4
]}

Lim, Sze Pei ^{[5
]}

Lee, Ning Cheng ^{[5
]}

Ran, Jiang ^{[6
]}

Xi, Cao ^{[6
]}

Wee, Koh Sau ^{[6
]}

Yong, Qingxiang ^{[6
]}

机构：

[1] ASM Pacific Technol Ltd, Hong Kong, Hong Kong, Peoples R China

[2] Jiangyin Changdian Adv Packaging Co Ltd, Jiangyin 214400, Peoples R China

[3] Dow Chem Co USA, Marlborough, MA 01752 USA

[4] Unimicron Technol Corp, Hsinchu, Taiwan

[5] Indium Corp, Clinton, NY 13323 USA

[6] Huawei Technol Co Ltd, Shenzhen 518129, Peoples R China

来源：

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY | 2017年 / 7卷 / 10期

关键词：

Fan-out wafer-level packaging (FOWLP); epoxy molding compound; thermal resistance; warpage; TECHNOLOGY;

D O I：

10.1109/TCPMT.2017.2715185

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

In this paper, the warpage and thermal performances of fan-out wafer-level packaging (FOWLP) are investigated. Emphasis is placed on the characterization of the effects of FOWLP important parameters, such as chip size, chip thickness, package/chip area ratio, epoxy molding compound (EMC), chip EMC cap, reconstituted carrier material and thickness, and die-attach film, on the warpage after postmold cure and backgrinding of the EMC. The simulation results are compared to the experimental measurements. Also, the thermal performance (junction-to-ambient thermal resistance) of FOWLP with various chip thicknesses is characterized. Finally, some FOWLP important parameters affecting the warpage and thermal performances are recommended.

引用

页码：1729 / 1738

页数：10

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