Rsyn - An Extensible Physical Synthesis Framework

被引:16
作者
Flach, Guilherme [1 ]
Fogaca, Mateus [1 ]
Monteiro, Jucemar [1 ]
Johann, Marcelo [1 ]
Reis, Ricardo [1 ]
机构
[1] Univ Fed Rio Grande do Sul UFRGS, Inst Informat, PGMicro PPGC, Porto Alegre, RS, Brazil
来源
ISPD'17: PROCEEDINGS OF THE 2017 ACM INTERNATIONAL SYMPOSIUM ON PHYSICAL DESIGN | 2017年
关键词
EDA; Physical Synthesis; Framework; Open Source; TIMING ANALYSIS; CONTEST;
D O I
10.1145/3036669.3038249
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Due to the advanced stage of development on EDA science, it has been increasingly difficult to implement realistic software infrastructures in academia so that new problems and solutions are tested in a meaningful and consistent way. In this paper we present Rsyn, a free and open-source C++ framework for physical synthesis research and development comprising an elegant netlist data model, analysis tools (e.g. timing analysis, congestion), optimization methods (e.g. placement, sizing, buffering) and a graphical user interface. It is designed to be very modular and incrementally extensible. New components can be easily integrated making Rsyn increasingly valuable as a framework to leverage research in physical design. Standard and third party components can be mixed together via code or script language to create a comprehensive design flow, which can be used to better assess the quality of results of the research being conducted. The netlist data model uses the new features of C++11 providing a simple but efficient way to traverse and modify the netlist. Attributes can be seamlessly added to objects and a notification system alerts components about changes in the netlist. The flexibility of the netlist inspired the name Rsyn, which comes from the word resynthesis. Rsyn is created to allow researchers to focus on what is really important to their research spending less time on the infrastructure development. Allowing the sharing and reusability of common components is also one of the main contributions of the Rsyn framework. In this paper, the key concepts of Rsyn are presented. Examples of use are drawn, the important standard components (e.g. physical layer, timing) are detailed and some case studies based on recent Electronic Design Automation (EDA) contests are analyzed. Rsyn is available at http://rsyn.design.
引用
收藏
页码:33 / 40
页数:8
相关论文
共 45 条
[1]  
[Anonymous], 2001, IEEE Std 1149.1-2001, P1, DOI DOI 10.1109/IEEESTD.2001.92950
[2]  
[Anonymous], 2010, ISPD '10, DOI [10.1145/1735023.1735048, DOI 10.1145/1735023.1735048]
[3]  
[Anonymous], GNU General Public License v3
[4]  
[Anonymous], ABC SYST SEQ SYNTH V
[5]  
[Anonymous], 2015, DAC
[6]  
C. Wolf, YOSYS OPEN SYNTHESIS
[7]   FLUTE: Fast lookup table based rectilinear Steiner minimal tree algorithm for VLSI design [J].
Chu, Chris ;
Wong, Yiu-Chung .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2008, 27 (01) :70-83
[8]  
Cplex, SOFTWARE PRODUCTS IB
[9]  
eecs, BOOKSHELF