Compact discrete-time chaos generator circuit

被引：46

作者：

Dudek, P ^{[1
]}

Juncu, VD ^{[1
]}

机构：

[1] Univ Manchester, Inst Sci & Technol, Dept Elect Engn & Elect, Manchester M60 1QD, Lancs, England

来源：

ELECTRONICS LETTERS | 2003年 / 39卷 / 20期

关键词：

D O I：

10.1049/el:20030881

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A three-transistor CMOS circuit is presented, with adjustable nonlinear characteristics, which can be used as a map that generates discrete-time chaotic signals. A method of constructing a chaos generator using two map circuits is also proposed. The circuit is very compact, which makes it suitable for applications requiring the integration of a large number of random signal generators on a single VLSI chip.

引用

页码：1431 / 1432

页数：2