A CMOS PLL using current-adjustable charge-pump and on-chip loop filter with initialization circuit

被引：2

作者：

Zhao, H ^{[1
]}

Ren, JY ^{[1
]}

Zhang, QL ^{[1
]}

机构：

[1] Fudan Univ, ASIC, Shanghai 200433, Peoples R China

来源：

2003 5TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS | 2003年

关键词：

D O I：

10.1109/ICASIC.2003.1277314

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A 900MHz CMOS PLL using current-adjustable charge-pump circuit and on-chip loop filter with initialization circuit is presented. The cliargc-puinr current is insensitive to the changes of temperature and power supply. The value of the charge-pump current can be changed by switches which are controlled by external signals. Thus the perforniance of the PLL, such as loop bandwidth, can be changed with the change of the charge-pump current. The loop filter initialization circuit can speed tip the PLL when power on. A multi-modulus prescaler is used to fulfill the frequency division in the feedback loop. The circuit is designed in 0.18mum 1.8v 1 P6M standard digital CMOS process.(1)

引用

页码：728 / 731

页数：4

共 25 条

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