Wafer-scale layer transfer of GaAs and Ge onto Si wafers using patterned epitaxial lift-off

被引:18
|
作者
Mieda, Eiko [1 ]
Maeda, Tatsuro [1 ]
Miyata, Noriyuki [1 ]
Yasuda, Tetsuji [1 ]
Kurashima, Yuichi [1 ]
Maeda, Atsuhiko [1 ]
Takagi, Hideki [1 ]
Aoki, Takeshi [2 ]
Yamamoto, Taketsugu [2 ]
Ichikawa, Osamu [2 ]
Osada, Takenori [2 ]
Hata, Masahiko [2 ]
Ogawa, Arito [3 ]
Kikuchi, Toshiyuki [3 ]
Kunii, Yasuo [3 ]
机构
[1] Natl Inst Adv Ind Sci & Technol, Tsukuba, Ibaraki 3058562, Japan
[2] Sumitomo Chem Co Ltd, Tsukuba, Ibaraki 3003294, Japan
[3] Hitachi Kokusai Elect Inc, Toyama 9392393, Japan
关键词
ROOM-TEMPERATURE; SILICON-WAFERS; INTERFACE CURRENT; BONDING STRENGTH; SURFACE;
D O I
10.7567/JJAP.54.036505
中图分类号
O59 [应用物理学];
学科分类号
摘要
We have developed a wafer-scale layer-transfer technique for transferring GaAs and Ge onto Si wafers of up to 300 mm in diameter. Lattice-matched GaAs or Ge layers were epitaxially grown on GaAs wafers using an AlAs release layer, which can subsequently be transferred onto a Si handle wafer via direct wafer bonding and patterned epitaxial lift-off (ELO). The crystal properties of the transferred GaAs layers were characterized by X-ray diffraction (XRD), photoluminescence, and the quality of the transferred Ge layers was characterized using Raman spectroscopy. We find that, after bonding and the wet ELO processes, the quality of the transferred GaAs and Ge layers remained the same compared to that of the as-grown epitaxial layers. Furthermore, we realized Ge-on-insulator and GaAs-on-insulator wafers by wafer-scale pattern ELO technique. (C) 2015 The Japan Society of Applied Physics
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页数:5
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