Estimation of hole mobility in strained Si1-xGex buried channel heterostructure PMOSFET

被引：6

作者：

Kar, GS

Ray, SK ^{[1
]}

Kim, T

Banerjee, SK

Chakrabarti, NB

机构：

[1] Indian Inst Technol, Dept Phys & Meteorol, Kharagpur 721302, W Bengal, India

[2] Univ Texas, Microelect Res Ctr, Austin, TX 78712 USA

[3] Indian Inst Technol, Dept Elect & Elect Commun Engn, Kharagpur 721302, W Bengal, India

来源：

SOLID-STATE ELECTRONICS | 2001年 / 45卷 / 05期

关键词：

D O I：

10.1016/S0038-1101(01)00096-X

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Fabricated strained Si/Si0.8Ge0.2/Si heterojunction PMOSFET devices have been used to calculate the hole mobility in surface-Si and buried-SiGe channels. A simple analysis based on the inversion layer mobility model has been used to find the current contribution of the buried-SiGe channel to the total drain current. The 'true' effective mobility enhancement in the buried channel of the fabricated Si0.8Ge0.2 PMOSFET device has thus been extracted over a temperature range of 77-300 K. The validity of the model has been verified by calculating the drain current as a function of drain voltage at different values of gate bias considering the estimated effective mobility of both parasitic-Si and buried-SiGe channels. (C) 2001 Elsevier Science Ltd. All rights reserved.

引用

页码：669 / 676

页数：8

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