Novel silicon-controlled rectifier (SCR) for high-voltage electrostatic discharge (ESD) applications

被引：64

作者：

Liu, Zhiwei ^{[1
]}

Liou, Juin J. ^{[1
,2
]}

Vinson, Jim ^{[3
]}

机构：

[1] Univ Cent Florida, Sch Elect Engn & Comp Sci, Orlando, FL 32816 USA

[2] Zhejiang Univ, Dept Informat Sci & Elect Engn, Hangzhou 310027, Peoples R China

[3] Intersil Corp, Corp Proc Reliabil Grp, Palm Bay, FL 32905 USA

来源：

IEEE ELECTRON DEVICE LETTERS | 2008年 / 29卷 / 07期

关键词：

electrostatic discharge (ESD); holding voltage; latchup immunity; transmission line pulsing (TLP);

D O I：

10.1109/LED.2008.923711

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Electrostatic discharge (ESD) protection, for high-voltage integrated circuits is challenging due to the requirement of high holding voltage to minimize the risk of ESD-induced latchup and electrical overstress. In this letter, a new silicon-controlled rectifier (SCR) is developed for this particular application. The SCR is designed based on the concept that the holding voltage can be increased by reducing the emitter injection efficiency in the SCR. This is accomplished by using a segmented emitter topology. Experimental data show that the new SCR can possess a holding voltage that is larger than 40 V and a failure current I(t2) that is higher than 28 mA/mu m.

引用

页码：753 / 755

页数：3

共 6 条

[1] Dependence of device structures on latchup immunity in a high-voltage 40-V CMOS process with drain-extended MOSFETs [J].

Hsu, Sheng-Fu ;

Ker, Ming-Dou .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2007, 54 (04) :840-851

[2] Overview of on-chip electrostatic discharge protection design with SCR-based devices in CMOS integrated circuits [J].

Ker, MD ;

Hsu, KC .

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2005, 5 (02) :235-249

[3]

QUITTARD O, 2006, P EOS ESD S, P77

[4] Comparison of ESD protection capability of lateral BJT, SCR and Bi-directional SCR for Hi-voltage BiCMOS circuits [J].

Vashchenko, V ;

Concannon, A ;

TerBeek, M ;

Hopper, P .

PROCEEDINGS OF THE 2002 BIPOLAR/BICMOS CIRCUITS AND TECHNOLOGY MEETING, 2002, :181-184

[5] High holding voltage cascoded LVTSCR structures for 5.5-V tolerant ESD protection clamps [J].

Vashchenko, VA ;

Concannon, A ;

ter Beek, M ;

Hopper, P .

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2004, 4 (02) :273-280

[6]

Voldman SH., 2007, Latchup

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