RF and microwave reconfigurable bandpass filter design using optimized active inductor circuit

被引:15
|
作者
Ben Hammadi, Aymen [1 ]
Haddad, Fayrouz [2 ]
Mhiri, Mongia [1 ]
Saad, Sehmi [1 ]
Besbes, Kamel [1 ]
机构
[1] Univ Monastir, Microelect & Instrumentat Lab, Fac Sci Monastir, Monastir 5019, Tunisia
[2] IM2NP UMR CNRS 7334 Polytech Marseille, IMT Technopole Chateau Gombert, Marseille 20, France
关键词
active bandpass filters; negative resistance circuit; noise figure; quality factor; tunable active inductors; wide tuning range; TUNING RANGE; LOW-POWER;
D O I
10.1002/mmce.21550
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
In this article, a design methodology of an active bandpass filter (BPF) using tunable active inductor (TAI) achieving wide frequency contiguous tuning range (FTR) is presented. The tunable BPF is realized with a differential TAI (DTAI) employing two-reconfiguration mechanisms one for coarse-tuning using a controllable current source while the fine-tuning is performed through a variable feedback resistance. The center frequency tuning is performed through the variation of the DTAI control voltages. A cross-coupled pair based negative resistance technique is also applied to compensate the resistive losses of equivalent RLC resonator. The filter performances are significantly improved using several optimization techniques such as voltage scaling and multigate finger techniques. The proposed BPF is simulated using 0.13 mu m CMOS technology. The filter achieves an insertion loss (IL) of 26.62-33.45 dB over the tuning range 1.16-3.27 GHz with a relative bandwidth of 1.3%-3.4%. The noise figure and input 1-dB compression point at 1.84 GHz are 14.93 dB and 2.72 dBm, respectively. The designed RF filter consumes an average power of 5 mW at 1 V supply voltage.
引用
收藏
页数:11
相关论文
共 45 条
  • [31] Realization of optimized fractional-order symmetric-slope bandpass filter using switched-capacitors
    Swain, S.
    Tripathy, M. C.
    Behera, S.
    SADHANA-ACADEMY PROCEEDINGS IN ENGINEERING SCIENCES, 2023, 48 (02):
  • [32] Realization of optimized fractional-order symmetric-slope bandpass filter using switched-capacitors
    S SWAIN
    M C TRIPATHY
    S BEHERA
    Sādhanā, 48
  • [33] Design of Active Inductor at 2.4 GHz frequency using 180 nm CMOS Technology
    Kumar, Rajan
    Sachan, Divyesh
    Yadav, Sonu Singh
    Sihara, Ankit Kumar
    Misra, Prasanna Kumar
    2017 4TH IEEE UTTAR PRADESH SECTION INTERNATIONAL CONFERENCE ON ELECTRICAL, COMPUTER AND ELECTRONICS (UPCON), 2017, : 477 - 481
  • [34] Design of CMOS based Reconfigurable LNA at Millimeter Wave frequency using Active Load
    Vinod, Bindhiya
    Balamurugan, Karthigha
    Jayakumar, M.
    2014 INTERNATIONAL CONFERENCE ON ADVANCED COMMUNICATION CONTROL AND COMPUTING TECHNOLOGIES (ICACCCT), 2014, : 713 - 718
  • [35] Design of active inductor-based current-controlled oscillators using gm/Id methodology
    Samiei, Mohammad
    Hashemipour, Omid
    AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 2018, 87 : 1 - 9
  • [36] A high-Q floating active inductor using 130 nm BiCMOS technology and its application in IF band pass filter
    Divyesh Sachan
    Manish Goswami
    Prasanna Kumar Misra
    Analog Integrated Circuits and Signal Processing, 2018, 96 : 385 - 393
  • [37] A high-Q floating active inductor using 130 nm BiCMOS technology and its application in IF band pass filter
    Sachan, Divyesh
    Goswami, Manish
    Misra, Prasanna Kumar
    ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2018, 96 (03) : 385 - 393
  • [38] High-Frequency Low-Current Second-Order Bandpass Active Filter Topology and Its Design in 28-nm FD-SOI CMOS
    Ballo, Andrea
    Grasso, Alfio Dario
    Pennisi, Salvatore
    Venezia, Chiara
    JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS, 2020, 10 (03) : 1 - 10
  • [39] A 0.95 dB Insertion Loss Compact Ultra Wideband Millimeter-Wave Bandpass Filter Using 0.18 μm RF CMOS Technology
    Vanukuru, Venkata Narayana Rao
    2020 IEEE 20TH TOPICAL MEETING ON SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS (SIRF), 2020, : 19 - 21
  • [40] Energy-Efficient Reconfigurable Computing Using a Circuit-Architecture-Software Co-Design Approach
    Paul, Somnath
    Chatterjee, Subho
    Mukhopadhyay, Saibal
    Bhunia, Swarup
    IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS, 2011, 1 (03) : 369 - 380