Low-energy and area-efficient tri-level switching scheme for SAR ADC

被引:153
作者
Yuan, C. [1 ]
Lam, Y. [1 ]
机构
[1] Nanyang Technol Univ, Sch Elect & Elect Engn, Singapore 639798, Singapore
关键词
Energy efficiency;
D O I
10.1049/el.2011.4001
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A novel low-energy tri-level switching scheme for low-power successive approximation register (SAR) ADC is proposed. With the input common-mode voltage (V-cm) designed to be exactly half of the reference voltage (V-ref), the switching energy of the proposed switching scheme is reduced by 96.89% as compared with the conventional architecture. Besides the large energy saving, the proposed switching scheme also reduces the number of capacitors in the ADC capacitor array by 75%, which in turn results in an area-efficient SAR ADC.
引用
收藏
页码:482 / U30
页数:2
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