Low-voltage CMOS VT extractor

被引：5
作者：
Vlassis, S. [1 ]
Psychalinos, C. [1 ]
机构：
[1] Univ Patras, Dept Phys, Elect Lab, GR-26504 Rion, Greece
来源：
ELECTRONICS LETTERS | 2007年 / 43卷 / 17期
关键词：
6;
D O I：
10.1049/el:20070917
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A new and accurate MOS threshold voltage (VT) extractor is proposed. The principle of operation is based on a novel negative feedback that reduces the effects caused by second-order factors and supply voltage variations. The advantages of the circuit against previous implementations are true low-voltage supply operation and low current consumption capabilities. Simulation results, based on the 0.35 mu m AMS BiCMOS process, demonstrate a variation of less than 0.3% of the extracted value of VT for a supply voltage in the range 1-3.6 V.
引用
收藏
页码：921 / 923
页数：3
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