Novel low-temperature polysilicon thin-film transistors with a self-aligned gate and raised source/drain formed by the damascene process

被引：8
|
作者：
Chang, Kow Ming [1 ]
Lin, Gin Min
Yang, Guo Liang
机构：
[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu 30010, Taiwan
[2] Natl Chiao Tung Univ, Inst Elect, Hsinchu 30010, Taiwan
来源：
IEEE ELECTRON DEVICE LETTERS | 2007年 / 28卷 / 09期
关键词：
damascene process; four masks; on/off current ratio; polycrystalline silicon thin-film transistor (poly-Si TFT); raised source/drain (RSD); self-aligned gate; thin channel;
D O I：
10.1109/LED.2007.903313
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this letter, a novel structure of the polycrystalline silicon thin-film transistors (TFTs) with a self-aligned gate and raised source/drain (RSD) formed by the damascene process has been developed and investigated. Comparing with the conventional coplanar TFT, the proposed RSD TFT has a remarkable lower OFF-state current (177 to 6.29 nA), and the ON/OFF current ratio is only slightly decreased from 1.71 x 10(7) to 1.39 x 10(7). Only four photomasking steps are required. This novel structure is an excellent candidate for further high-performance large-area device applications.
引用
收藏
页码：806 / 808
页数：3
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