Hardware Design of Correlation Filters for Target Detection

被引:15
作者
Akbar, Naeem [1 ]
Tehsin, Sara
Rehman, Haseeb Ur
Rehman, Saad
Young, Rupert [2 ]
机构
[1] Natl Univ Sci & Technol, Islamabad, Pakistan
[2] Univ Sussex, Brighton, E Sussex, England
来源
PATTERN RECOGNITION AND TRACKING XXX | 2019年 / 10995卷
关键词
Hardware design; Correlation filter; Automatic target recognition; PERFORMANCE;
D O I
10.1117/12.2519497
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Correlation filters due to its three protuberant advantages have proven very effective for automatic target detection, biometric verification and security applications. In this paper, correlation filters are implemented in hardware FPGA keeping in view their importance in real time applications. Hardware implementation results are placed in comparison with results generated through software. These results are almost similar with a negligible variation i.e. 10-4, which is demonstrated in the experimental section, in addition to valuable time reduction. The hardware design of these filters is implemented in LabView which can be subsequently employed in real-time security applications. This design may be expanded for other advanced variants of correlation filters in future work.
引用
收藏
页数:9
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