Single-Event Upset (SEU) Results of Embedded Error Detect and Correct Enabled Block Random Access Memory (Block RAM) Within the Xilinx XQR5VFX130

被引:21
作者
Allen, Gregory R. [1 ]
Edmonds, Larry [1 ]
Tseng, Chen Wei [2 ]
Swift, Gary [2 ]
Carmichael, Carl [2 ]
机构
[1] CALTECH, Jet Prop Lab, Pasadena, CA 91109 USA
[2] Xilinx Inc, San Jose, CA 95124 USA
关键词
Error detect and correct; field programmable gate arrays (FPGA); single-event effects (SEV); upset mitigation; MITIGATION;
D O I
10.1109/TNS.2010.2085447
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Recent heavy ion measurements of the single-event upset (SEU) cross section for 65 nm embedded block random access memory (Block RAM) are presented. Results of initial investigation into the on-chip Error Detection and Correction (EDAC) are also discussed.
引用
收藏
页码:3426 / 3431
页数:6
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