Efficient Countermeasure for Reliable KECCAK Architecture against Fault Attacks

被引:0
作者
Mestiri, Hassen [1 ]
Kahri, Fatma [1 ]
Bouallegue, Belgacem [1 ,2 ]
Marzougui, Mehrez [1 ,2 ]
Machhout, Mohsen [1 ]
机构
[1] Univ Monastir, Fac Sci Monastir, Elect & Microelect Lab EuEL, Monastir, Tunisia
[2] King Khalid Univ, Coll Comp Sci, Abha, Saudi Arabia
来源
2017 2ND INTERNATIONAL CONFERENCE ON ANTI-CYBER CRIMES (ICACC) | 2017年
关键词
Cryptography; Security; KECCAK algorithm; Fault detection; Fault attacks;
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
The cryptographic KECCAK algorithm has been developed by the circuit architect with the objective to enhance the design performances from frequency, throughput, efficiency, power consumption and area viewpoint of. The cryptographic KECCAK algorithm is implemented in many cryptographic circuits to ensure security. It is become the standard algorithm used to ensure the information integrity in numerous applications. To secure the KECCAK algorithm against the physical attacks as the fault attacks, a few numbers of countermeasures have been proposed. These fault attacks consist to inject a faulty data into KECCAK design to obtain the confidential information. In this work, we proposed a fault detection scheme based scrambling technique to secure KECCAK algorithm. We explain the KECCAK scheme details in each operation. The simulation faults results demonstrate that the fault coverage percentage reaches 99.995% for KECCAK scheme. In addition, the proposed architecture has been implemented on the FPGA platform. The frequency and the throughput degradations and area overhead of the KECCAK detection scheme have been evaluated and it is shown that our scheme leads high performances from frequency and throughput viewpoint.
引用
收藏
页码:55 / 59
页数:5
相关论文
共 11 条
[1]  
Barbara D. Nicholas, 2013, INT J ENG TRENDS TEC, V4, P2438
[2]  
Dworkin Morris J., 2015, FIPS202
[3]  
George-Paris Makkas, 2014, 6 INT S CCSP ATH 21, P538
[4]  
Guido B., KECCAK SHA 3 SUBMISS
[5]  
Jararweh Y., 2012, J. Inf. Secur, V3, P69, DOI [10.4236/jis.2012.32008, DOI 10.4236/JIS.2012.32008]
[6]   High Speed FPGA Implementation of Cryptographic KECCAK Hash Function Crypto-Processor [J].
Kahri, Fatma ;
Mestiri, Hassen ;
Bouallegue, Belgacem ;
Machhout, Mohsen .
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2016, 25 (04)
[7]   Concurrent Error Detection for Reliable SHA-3 Design [J].
Luo, Pei ;
Lit, Cheng ;
Fei, Yunsi .
2016 INTERNATIONAL GREAT LAKES SYMPOSIUM ON VLSI (GLSVLSI), 2016, :39-44
[8]  
LUO Pei, 2016, 13 WORKSH FDTC CRYPT
[9]  
Pereira F., 2013, Parallel Cloud Comput, V2, P1
[10]  
Reyhani-Masoleh Arash, 2014, IEEE T COMPUTER AIDE, V33