Capacitive discharge based transient analysis with fault detection methodology in DC system

被引:24
作者
Yeap, Yew Ming [1 ]
Geddada, Nagesh [1 ]
Ukil, Abhisek [2 ]
机构
[1] Nanyang Technol Univ, Sch Elect & Elect Engn, Singapore, Singapore
[2] Univ Auckland, Dept Elect & Comp Engn, Auckland, New Zealand
关键词
DC fault; Multi-terminal DC; DC experimental setup; Fault detection; Correlation coefficient; DC-link capacitor; HVDC TRANSMISSION-SYSTEM; PROTECTION STRATEGY; LOCATION METHOD; CIRCUIT; CONVERTERS;
D O I
10.1016/j.ijepes.2017.10.023
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Multi-terminal DC (MTDC) system based on voltage source converter (VSC) promises a new opportunity for bulk power transmission but it is still met with dire protection issues. This paper presents a transient analysis based on DC-link capacitive discharge which can be leveraged to design a fault detection method. Under certain critical fault conditions, the fault-induced transient can be quite weak for fault detection to work properly. However, the proposed method is minimally influenced by the fault location and resistance. The fault detection time can be kept within 1 ms, which is well-suited to the requirement of the DC circuit breaker. Another important feature of this method is the ability to distinctly recognize the bus fault and external faults, such as AC fault and sudden blocking of gate signal. Besides that, it only requires the local measurement at the terminal to perform necessary computations. The fault detection is tested on a simulation model developed in PSCAD/EMTDC and experimental model, from which different fault types and conditions are investigated. For fair evaluation, the performance of this method on MTDC system is compared with di/dt method.
引用
收藏
页码:127 / 137
页数:11
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