Demonstration of fully functional 8Mb perpendicular STT-MRAM chips with sub-5ns writing for non-volatile embedded memories

被引：0

作者：

Jan, Guenole ^{[1
]}

Thomas, Luc ^{[1
]}

Le, Son ^{[1
]}

Lee, Yuan-Jen ^{[1
]}

Liu, Huanlong ^{[1
]}

Zhu, Jian ^{[1
]}

Tong, Ru-Ying ^{[1
]}

Pi, Keyu ^{[1
]}

Wang, Yu-Jen ^{[1
]}

Shen, Dongna ^{[1
]}

He, Renren ^{[1
]}

Haq, Jesmin ^{[1
]}

Teng, Jeffrey ^{[1
]}

Lam, Vinh ^{[1
]}

Huang, Kenlin ^{[1
]}

Zhong, Tom ^{[1
]}

Torng, Terry ^{[1
]}

Wang, Po-Kang ^{[1
]}

机构：

[1] TDK Headway Technol Inc, Milpitas, CA 95035 USA

来源：

2014 SYMPOSIUM ON VLSI TECHNOLOGY (VLSI-TECHNOLOGY): DIGEST OF TECHNICAL PAPERS | 2014年

关键词：

MRAM; embedded memory; data retention;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We present major breakthroughs in MTJ design for STT-MRAM applications allowing reliable write for pulse lengths down to 1.5ns, data retention up to 125 degrees C for 10 years and full compatibility with BEOL process up to 400 degrees C for 1 hour. We have successfully integrated the novel structure onto an 8Mbit test chip. We demonstrate writing of every single cell in the array using sub-5ns pulses over a wide temperature range without using any error correction. We also show that sensing times of 4ns are sufficient to read every data cell. The inherent scalability of the design makes it a prime candidate for universal embedded non-volatile memories down to the 28nm node and beyond.

引用

页数：2