Toward Effective Countermeasures against an Improved Fault Sensitivity Analysis

被引:6
作者
Li, Yang [1 ]
Ohta, Kazuo [1 ]
Sakiyama, Kazuo [1 ]
机构
[1] Univ Electrocommun, Dept Informat, Chofu, Tokyo 1828585, Japan
关键词
side-channel attacks; fault sensitivity analysis; countermeasures; WDDL; AES; POWER ANALYSIS; ATTACK;
D O I
10.1587/transfun.E95.A.234
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper proposes the countermeasures against an improved fault sensitivity analysis. Our countermeasure is proposed based on the WDDL technique due to its built-in resistance against both the power-based attack and differential fault analysis. At CHES 2010, Li et al. proposed the FSA attack on WDDL-AES. The vulnerability of WDDL-AES in their attack mainly comes from the implementation deficiency rather than the WDDL technique itself. This paper first proposes an improved fault sensitive analysis that can threat a well-implemented WDDL-AES based on the input-data dependency for the critical path delay of WDDL S-box. Then we discuss the possibility of efficient countermeasures by modifying the WDDL circuit with a limited overhead. The countermeasures are discussed based on either modifying the dual-rail to single-rail converter or the introduction of the enable signal.
引用
收藏
页码:234 / 241
页数:8
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