Annealing of Heavy-Ion Induced Floating Gate Errors: LET and Feature Size Dependence

被引:30
作者
Bagatin, Marta [1 ,2 ]
Gerardin, Simone [1 ,2 ]
Cellere, Giorgio [1 ]
Paccagnella, Alessandro [1 ,2 ]
Visconti, Angelo [3 ]
Beltrami, Silvia [3 ]
Bonanomi, Mauro [3 ]
Harboe-Sorensen, Reno [4 ]
机构
[1] Univ Padua, Dipartimento Ingn Informaz, RREACT Grp, I-35100 Padua, Italy
[2] Ist Nazl Fis Nucl, Padua, Italy
[3] Numonyx, R&D Technol Dev, Agrate Brianza, MI, Italy
[4] ESA ESTEC, Noordwijk, Netherlands
关键词
Annealing; flash memories; heavy ions; radiation effects; ADVANCED FLASH MEMORIES; SINGLE IONS; NAND; CELLS;
D O I
10.1109/TNS.2010.2045131
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We discuss the room temperature annealing of Floating Gate errors in Flash memories with NAND and NOR architecture after heavy-ion irradiation. We present the evolution of raw bit errors as a function of time after the exposure, examining the annealing dependence on the particle LET, cell feature size, and, for Multi Level Cells, on the program level. The results are explained based on the statistical properties of the cell threshold voltage distributions before and after heavy-ion strikes.
引用
收藏
页码:1835 / 1841
页数:7
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