On-chip System Level Protection of FM Antenna Pin

被引:0
|
作者
Notermans, Guido [1 ]
Maksimovic, Dejan [1 ]
Vermont, Gerd [2 ]
van Maasakkers, Michiel [3 ]
Pusa, Fredrik [4 ]
Smedes, Theo [5 ]
机构
[1] ST Ericsson, Binzstr 38, CH-8045 Zurich, Switzerland
[2] ST Ericsson, B-1930 Zaventem, Belgium
[3] ST Ericsson, NL-6534 AB Nijmegen, Netherlands
[4] Catena Wireless Elect, SE-16446 Kista, Sweden
[5] NXP Semicond, NL-6534 AE Nijmegen, Netherlands
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An on-chip protection against IEC 61000-4-2 discharges is presented. The protection level is tested by means of HMM stress. The failure signature is identified by means of TLP testing and physical failure analysis. It is shown that it is possible to accurately predict the HMM failure level by means of a simplified circuit model, calibrated by means of 100ns TLP data.
引用
收藏
页数:8
相关论文
共 50 条
  • [21] Power analysis of system-level on-chip communication architectures
    Lahiri, K
    Raghunathan, A
    INTERNATIONAL CONFERENCE ON HARDWARE/SOFTWARE CODESIGN AND SYSTEM SYNTHESIS, 2004, : 236 - 241
  • [22] System-level Pareto frontiers for on-chip thermoelectric coolers
    Sevket U. Yuruker
    Michael C. Fish
    Zhi Yang
    Nicholas Baldasaro
    Philip Barletta
    Avram Barcohen
    Bao Yang
    Frontiers in Energy, 2018, 12 : 109 - 120
  • [23] A two-level on-chip bus system based on multiplexers
    Jhang, KS
    Yi, K
    Hwang, SY
    ADVANCES IN COMPUTER SYSTEMS ARCHITECTURE, PROCEEDINGS, 2004, 3189 : 363 - 372
  • [24] On-Chip Transaction Level Debug Support for System-on-Chips
    Gharehbaghi, Amir Masoud
    Fujita, Masahiro
    2009 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC 2009), 2009, : 124 - 127
  • [25] ON-CHIP DIAGNOSTICS TEST FIFO MEMORY CELLS AT SYSTEM LEVEL
    CHAN, T
    FREIE, M
    KNORPP, K
    ELECTRONIC DESIGN, 1988, 36 (13) : 117 - 121
  • [26] System-level Pareto frontiers for on-chip thermoelectric coolers
    Yuruker, Sevket U.
    Fish, Michael C.
    Yang, Zhi
    Baldasaro, Nicholas
    Barletta, Philip
    Barcohen, Avram
    Yang, Bao
    FRONTIERS IN ENERGY, 2018, 12 (01) : 109 - 120
  • [27] SHUNT REGULATOR WITH ON-CHIP TEMPERATURE PROTECTION
    RADNAI, R
    ELECTRONIC ENGINEERING, 1978, 50 (605): : 11 - 11
  • [28] A Fully Contactless Wafer-Level Testing for UHF RFID Tag with On-Chip Antenna
    Finocchiaro, Alessandro
    Girlando, Giovanni
    Motta, Alessandro
    Pagani, Alberto
    Palmisano, Giuseppe
    2018 13TH INTERNATIONAL CONFERENCE ON DESIGN & TECHNOLOGY OF INTEGRATED SYSTEMS IN NANOSCALE ERA (DTIS 2018), 2018,
  • [29] 135-GHz Micromachined On-Chip Antenna and Antenna Array
    Chu, Hui
    Guo, Yong-Xin
    Lim, Teck-Guan
    Khoo, Yee Mong
    Shi, Xiangquan
    IEEE TRANSACTIONS ON ANTENNAS AND PROPAGATION, 2012, 60 (10) : 4582 - 4588
  • [30] On-Chip Transient Voltage Suppressor Integrated With Silicon-Based Transceiver IC for System-Level ESD Protection
    Chuang, Che-Hao
    Ker, Ming-Dou
    IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2014, 61 (10) : 5615 - 5621