10-bit, 3 mW continuous-time Sigma-Delta ADC for UMTS in a 0.12 μm CMOS process

被引：18

作者：

Dörrer, L ^{[1
]}

Kuttner, F ^{[1
]}

Wiesbauer, A ^{[1
]}

Di Giandomenico, A ^{[1
]}

Hartig, T ^{[1
]}

机构：

[1] Infineon Technol Austria, A-9500 Villach, Austria

来源：

ESSCIRC 2003: PROCEEDINGS OF THE 29TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE | 2003年

关键词：

D O I：

10.1109/ESSCIRC.2003.1257118

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A 10bit-resolution continuous-time multi-bit SigmaDelta ADC for UMTS is introduced. A power-efficient implementation of a 3(rd)-order multi-bit modulator is presented: By using a feedforward architecture and quantizer dynamic element matching the dissipated power can be reduced. Clocked at 104 MHz, the 0.12 mum CMOS SigmaDelta ADC achieves 60dB peak SNR over a 2 MHz signal bandwidth, consuming 3mW at 1.2V supply.

引用

页码：245 / 248

页数：4

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