PULP: A Ultra-Low Power Parallel Accelerator for Energy-Efficient and Flexible Embedded Vision

被引:47
|
作者
Conti, Francesco [1 ]
Rossi, Davide [1 ]
Pullini, Antonio [2 ]
Loi, Igor [1 ]
Benini, Luca [1 ,2 ]
机构
[1] Univ Bologna, Dept Elect Elect & Informat Engn, Bologna, Italy
[2] Swiss Fed Inst Technol, Integrated Syst Lab, Zurich, Switzerland
关键词
Ultra-Low Power; Embedded vision; Convolutional Neural Network; Optical flow; Motion estimation; FD-SOI; Multi-core; OpenRISC; MOTION ESTIMATION; ARCHITECTURE; PROCESSOR; EXPLORATION; MULTIMEDIA; CLUSTER; ENGINE; CORE; CMOS;
D O I
10.1007/s11265-015-1070-9
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Novel pervasive devices such as smart surveillance cameras and autonomous micro-UAVs could greatly benefit from the availability of a computing device supporting embedded computer vision at a very low power budget. To this end, we propose PULP (Parallel processing Ultra-Low Power platform), an architecture built on clusters of tightly-coupled OpenRISC ISA cores, with advanced techniques for fast performance and energy scalability that exploit the capabilities of the STMicroelectronics UTBB FD-SOI 28nm technology. We show that PULP performance can be scaled over a 1x-354x range, with a peak theoretical energy efficiency of 211 GOPS/W. We present performance results for several demanding kernels from the image processing and vision domain, with post-layout power modeling: a motion detection application that can run at an efficiency up to 192 GOPS/W (90 % of the theoretical peak); a ConvNet-based detector for smart surveillance that can be switched between 0.7 and 27fps operating modes, scaling energy consumption per frame between 1.2 and 12mJ on a 320 x240 image; and FAST + Lucas-Kanade optical flow on a 128 x128 image at the ultra-low energy budget of 14 mu J per frame at 60fps.
引用
收藏
页码:339 / 354
页数:16
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