Grid synchronization and symmetrical components extraction with PLL algorithm for grid connected power electronic converters - a review

被引:56
作者
Bobrowska-Rafal, M. [1 ]
Rafal, K. [1 ]
Jasinski, M. [1 ]
Kazmierkowski, M. P. [1 ]
机构
[1] Warsaw Univ Technol, Inst Control & Ind Elect, 75 Koszykowa St, PL-00662 Warsaw, Poland
关键词
Phase Locked Loop (PLL); symmetrical component extraction; grid synchronization; grid-connected converter; smart grid; Renewable Energy Sources (RES); voltage dip; higher harmonics; power quality; PWM RECTIFIER; PHASE;
D O I
10.2478/v10175-011-0060-8
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
In this paper, a review of Phase Locked Loop (PLL) algorithms and symmetrical component extraction methods intended for grid-connected power electronic converters are presented. Proposed classification is based on voltage representation in three coordinates: natural (abc), stationary (alpha beta) and rotating coordinates (dq). The three selected algorithms are described in details: Dual Second Order Generalized Integrator (DSOGI-PLL), Dual Virtual Flux both in stationary coordinates. The third one, in rotating dq coordinates, is Dual Synchronous Reference Frame PLL (DSRF-PLL). A comparison of PLL algorithms is presented. Also, selected experimental results are given to verify practical application of discussed algorithms.
引用
收藏
页码:485 / 497
页数:13
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