Hardware-Efficient Beamspace Direction-of-Arrival Estimator for Unequal-Sized Subarrays

被引:6
作者
Guo, Ziyu [1 ]
Wang, Weizhen [1 ]
Wang, Xiaodong [2 ]
Zeng, Xiaoyang [1 ]
机构
[1] Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China
[2] Columbia Univ, Elect Engn Dept, New York, NY 10027 USA
基金
中国国家自然科学基金; 中国博士后科学基金;
关键词
Direction-of-arrival estimation; Estimation; Hardware; Antenna arrays; Antennas; Array signal processing; Radio frequency; Hybrid antenna array; unequal-sized subarrays; direction-of-arrival (DoA); beamspace processing; application-specific integrated circuit (ASIC); LOW-LATENCY; MUSIC; ALGORITHM;
D O I
10.1109/TCSII.2021.3125407
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Hybrid antenna array consisting of analog subarrays has been widely used for beamforming in millimeter-wave communication systems. Due to the hybrid structure, direction-of-arrival (DoA) estimation, which is essential to beam adjustment, has to be performed at the beamspace. In our previous work, unequal-sized subarrays has been proposed for beamspace DoA estimation because it can resolve the ambiguity problem, i.e., the DoA estimate at the beamspace may be non-unique. In this brief, we develop and implement a hardware-efficient beamspace DoA estimator dedicated for unequal-sized subarrays. Specifically, the proposed algorithm is tailored for hardware implementation such that the number of multiplications is reduced by 75% without significant performance loss. The proposed hardware architecture is layouted in 28-nm technology with a core area of 0.09 mm(2), a hardware complexity of 132 kilogate equivalents (kGE), and a clock frequency of 2.17 GHz.
引用
收藏
页码:1044 / 1048
页数:5
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