Absorber Length Optimization of On-Chip Colliding Pulse Mode-Locked Semiconductor Laser

被引:5
作者
Gordon, Carlos [1 ]
Cumbajin, Myriam [2 ]
Carpintero, Guillermo [3 ]
Bente, Erwin [4 ]
Javaloyes, Julien [5 ]
机构
[1] Univ Tecn Ambato, Fac Ingn Sistemas Elect & Ind, Ambato 180150, Ecuador
[2] Univ Tecnol Indoamer, Fac Ingn Ind, Ambato 180150, Ecuador
[3] Univ Carlos III Madrid, Dept Elect Technol, Madrid 28911, Spain
[4] Eindhoven Univ Technol, Dept Elect Engn, POB 513, NL-5600 MB Eindhoven, Netherlands
[5] Univ Illes Balears, Dept Fis, Palma De Mallorca 07122, Spain
关键词
Laser mode locking; optical pulse generation; semiconductor lasers; quantum well lasers; semiconductor device modeling; DIODE-LASERS; LOCKING; GENERATION;
D O I
10.1109/JSTQE.2017.2759263
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We present theoretical and experimental results regarding the saturable absorber length optimization for the generation of stable mode-locked regimes of a novel on-chip colliding pulse mode-locked semiconductor laser structure. We have been able to apply the design criteria acquired from previous theoretical and experimental reports to define a suitable gain section length for a given saturable absorber section length. The latter is independent from the cavity length and allows obtaining stable mode-locked regimes with the required repetition rate and pulse width in the range of picoseconds for different applications. We have developed four on-chip colliding pulse mode-locked laser structures with saturable absorber lengths ranging from 20 to 50 mu m in steps of 10 mu m with fundamental repetition rate at 25 GHz and twice this frequency at 50 GHz when operated in the colliding pulse mode-locked regime. The theoretical study was carried out by using the simulation tool called FreeTWM which is a free travelling wave model software designed for the study of the dynamics of multi-section semiconductor lasers, while the experimental analysis was executed on the samples fabricated on a generic InP photonic integrated technology through a multi-projectwafer run.
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页数:8
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