A model-selection approach to the VLSI design of vector quantizers

被引：0

作者：

Bracco, M ^{[1
]}

Ridella, S ^{[1
]}

Zunino, R ^{[1
]}

机构：

[1] Univ Genoa, Dept Biophys & Elect Engn, DIBE, I-16145 Genoa, Italy

来源：

PROCEEDINGS OF THE INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS 2003, VOLS 1-4 | 2003年

关键词：

D O I：

暂无

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

A formal methodology supports the design of digital devices for Hierarchical Vector Quantization (HVQ). A model-selection approach based on the Minimum Description Length criterion is enhanced by circuit-related aspects allowing efficient design. The resulting parameters drive the subsequent digital VLSI realization, which yields a HVQ chip providing cost-effective, computationally efficient real-time performances. Real-world applications support the consistency of the VQ approach and the effectiveness of the HVQ device.

引用

页码：959 / 964

页数：6

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