High-speed and high-precision current winner-take-all circuit

被引:39
作者
Fish, A [1 ]
Milrud, V
Yadid-Pecht, O
机构
[1] VLSI Syst Ctr, IL-84105 Beer Sheva, Israel
[2] Univ Calgary, Dept Elect & Comp Engn, Calgary, AB T2N 1N4, Canada
关键词
analog circuits; analog integrated circuits; CMOS analog integrated circuits; neural networks; winner take all (WTA);
D O I
10.1109/TCSII.2004.842062
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A CMOS high-performance current-mode winner-take-all circuit is presented. The circuit employs a novel technique for inhibitory and excitatory feedbacks based on input currents average computation, achieving both high speed and high precision. The circuit is designed for operation with a wide range of input current values, allowing its integration with circuits operating both in subthreshold and in strong inversion regions. Two circuits, each for a different range of input currents, have been implemented in a standard 0.35-mu m CMOS process available through MOSIS and are operated via a 3.3-V supply. Their operation is discussed, simulation results are reported and preliminary measurements from a test chip are presented.
引用
收藏
页码:131 / 135
页数:5
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