Spiral: A heuristic mapping algorithm for network on chip

被引：14

作者：

Mehran, Armin ^{[1
]}

Saeidi, Samira

Khademzadeh, Ahmad

Afzali-Kusha, Ali

机构：

[1] Isl Azad Univ, CE Dept, Sci & Res Branch, Tehran, Iran

[2] Isl Azad Univ, CE Dept, Tehran Ctr Branch, Tehran, Iran

[3] Iran Telecom Res Ctr, Tehran, Iran

[4] Univ Tehran, Sch Elect & Comp Engn, Nanoelect Ctr Excellence, Tehran, Iran

来源：

IEICE ELECTRONICS EXPRESS | 2007年 / 4卷 / 15期

关键词：

network on chip; mapping algorithm; task graph;

D O I：

10.1587/elex.4.478

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, a heuristic core mapping algorithm for 2- D mesh topologies called Spiral is proposed. To compare the efficacy of the algorithm, the results of the proposed algorithm are compared with those of the genetic and random mapping algorithms. The experimental results of synthetic traffic profiles reveal that the Spiral algorithm improves the reduction in the energy consumption as well as the speed of performing application compared to those of the genetic algorithm mapping.

引用

页码：478 / 484

页数：7

共 9 条

[1]

Garey M. R., 1979, FREEMAN

[2]

Guerrier P., 2000, Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537), P250, DOI 10.1109/DATE.2000.840047

[3] Energy-aware mapping for tile-based NoC architectures under performance constraints [J].

Hu, JC ;

Marculescu, R .

ASP-DAC 2003: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, 2003, :233-239

[4]

Kumar S, 2002, IEEE COMP SOC ANN, P117, DOI 10.1109/ISVLSI.2002.1016885

[5]

Lei T, 2003, EUROMICRO SYMPOSIUM ON DIGITAL SYSTEM DESIGN, PROCEEDINGS, P180

[6]

Nickray M, 2005, PROCEEDINGS OF THE 2005 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOL 3, P273

[7]

SAEIDI S, 2007, ISSCS 2007 PID360581

[8]

Shin DK, 2004, INTERNATIONAL CONFERENCE ON HARDWARE/SOFTWARE CODESIGN AND SYSTEM SYNTHESIS, P170

[9]

UMIT Y, 2005, P CODES ISSS 05 NEW, P69

← 1 →