A 250-ps time-resolution CMOS multihit time-to-digital converter for nuclear physics experiments

被引:18
|
作者
Bigongiari, F [1 ]
Roncella, R [1 ]
Saletti, R [1 ]
Terreni, P [1 ]
机构
[1] Univ Pisa, Dipartimento Ingn Informaz, I-56126 Pisa, Italy
关键词
application specific integrated circuit; delay lines; delay lock loop; time measurements;
D O I
10.1109/23.757192
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a CMOS realization of a time-to-digital converter (TDC) for nuclear physics experiments. An innovative and robust architecture, already used in a previous TDC version with 1 ns of bin size, has been adopted and improved with the aim to achieve a 500-ps bin size. The TDC has eight input channels plus a common channel. It can store up to 32 events per channel with a double-hit resolution of 8 ns. It can realize common-start and common-stop operations. It has 4.2 ms of input range with a 125-MHz system clock, The chip uses an asynchronous interpolator system based on a delay-locked Line to increase the coarse resolution. It has been fabricated in a double-metal single poly n-well, 1-mu m CMOS process with an area of about 77 mm(2). Measurements show that the TDC has better performance compared to similar devices, especially the time resolution below 250 ps.
引用
收藏
页码:73 / 77
页数:5
相关论文
共 50 条
  • [1] 250-ps time-resolution CMOS multihit time-to-digital converter for nuclear physics experiments
    Telecomunicazioni Univ of Pisa, Pisa, Italy
    IEEE Trans Nucl Sci, 2 (73-77):
  • [2] A 100-ps time-resolution CMOS time-to-digital converter for positron emission tomography imaging applications
    Swann, BK
    Blalock, BJ
    Clonts, LG
    Binkley, DM
    Rochelle, JM
    Breeding, E
    Baldwin, KM
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2004, 39 (11) : 1839 - 1852
  • [3] A 41 ps ASIC time-to-digital converter for physics experiments
    Russo, Stefano
    Petra, Nicola
    De Caro, Davide
    Barbarino, Giancarlo
    Strollo, Antonio G. M.
    NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION A-ACCELERATORS SPECTROMETERS DETECTORS AND ASSOCIATED EQUIPMENT, 2011, 659 (01): : 422 - 427
  • [4] A Multihit Time-to-Digital Converter Architecture on FPGA
    Amiri, Amir Mohammad
    Boukadoum, Mounir
    Khouas, Abdelhakim
    IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2009, 58 (03) : 530 - 540
  • [5] A fine time-resolution (< 3 ps-rms) Time-to-Digital Converter for Highly Integrated Designs
    Perktold, Lukas
    Christiansen, Jorgen
    2013 IEEE INTERNATIONAL INSTRUMENTATION AND MEASUREMENT TECHNOLOGY CONFERENCE (I2MTC), 2013, : 1092 - 1097
  • [6] A BiCMOS time-to-digital converter with 30 ps resolution
    Räisänen-Ruotsalainen, E
    Rahkonen, T
    Kostamovaara, J
    ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1: VLSI, 1999, : 278 - 281
  • [7] Multihit multichannel time-to-digital converter with ±1% differential nonlinearity and near optimal time resolution
    Andreani, P
    Bigongiari, F
    Roncella, R
    Saletti, R
    Terreni, P
    Bigongiari, A
    Lippi, M
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1998, 33 (04) : 650 - 656
  • [8] Multihit multichannel time-to-digital converter with ±1% differential nonlinearity and near optimal time resolution
    Department of Applied Electronics, Lund University, Lund, Sweden
    不详
    不详
    IEEE J Solid State Circuits, 4 (650-656):
  • [9] An integrated digital CMOS time-to-digital converter with 92 ps LSB
    Mantyniemi, A
    Rahkonen, T
    Kostamovaara, J
    1998 MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS, 1999, : 180 - 183
  • [10] Monolithic time-to-digital converter with 20ps resolution
    Tisa, S
    Lotito, A
    Giudice, A
    Zappa, F
    ESSCIRC 2003: PROCEEDINGS OF THE 29TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE, 2003, : 465 - 468