Towards a design space exploration tool for MPSoC platforms design: a case study

被引：0

作者：

Brillu, Romain ^{[1
,2
]}

Pillement, Sebastien ^{[2
]}

Lemonnier, Fabrice ^{[1
]}

Millet, Philippe ^{[1
]}

Lenormand, Eric ^{[1
]}

Bernot, Marc ^{[3
]}

Falzon, Frederic ^{[3
]}

机构：

[1] Thales Res & Technol, F-91767 Palaiseau, France

[2] Univ Nantes, LUNAM Univ, IETR, F-44306 Nantes, France

[3] Thales Alenia Space France, F-06156 Cannes La Bocca, France

来源：

2014 22ND EUROMICRO INTERNATIONAL CONFERENCE ON PARALLEL, DISTRIBUTED, AND NETWORK-BASED PROCESSING (PDP 2014) | 2014年

关键词：

Algorithm Architecture matching; Design Space Exploration; Platform Based Design; Phase diversity; PHASE-RETRIEVAL;

D O I：

10.1109/PDP.2014.116

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The deployment of an application onto a multicore architecture is often a long and difficult process. This is due to the fact that the characteristics of both the architecture and the application are taken into account late in the development process. It's therefore necessary to have tools pruning the solution space efficiently and accurately. In order to define such a tool, this work defines the basic metrics and step for a design space exploration ("DSE") flow. To this end our proposal have been tested and validated for a space application that requires both a high computing power and an architecture compatible with the space constraints. The results obtained are promising and have shown the viability of the approach.

引用

页码：466 / 473

页数：8

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