Low-power 24 GHz CMOS receiver front-end using isolation enhancement technique for automatic radar systems

This article describes a monolithic receiver front-end comprising a low-noise amplifier, a dual-gate mixer, and an intermediate-frequency (IF) amplifier implemented in a standard 0.18 mu m CMOS technology. Over the frequency band of interest, flat and high conversion-gain (CG) and flat and low noise-figure (NF) are achieved simultaneously by adopting slightly under-damped Q-factors for the second-order CG and NF frequency responses. To suppress the high-frequency noise and to enhance the RFIF and LOIF isolation, RC low-pass filters (i.e., IF filters) are added at output of the dual-gate mixer and the cascode IF amplifier. The receiver front-end dissipates 16.4 mW and exhibits an NF of 6.86 dB and a CG of 22.26 dB at 24 GHz. In addition, excellent isolation is also achieved. The measured LOIF, RFIF, and LORF isolation is -31.31, -49.36, and -58.93 dB, respectively, at 24 GHz. The chip area is only 1.21 x 0.7 mm2, that is, 0.847 mm2, excluding the test pads. (C) 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:14711476, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26835