An 8.5-Gb/s Fully Integrated CMOS Optoelectronic Receiver Using Slope-Detection Adaptive Equalizer

被引：72

作者：

Lee, Dongmyung ^{[1
]}

Han, Jungwon

Han, Gunhee ^{[1
]}

Park, Sung Min ^{[2
]}

机构：

[1] Yonsei Univ, Dept Elect & Elect Engn, Seoul 120749, South Korea

[2] Ewha Womans Univ, Dept Elect Engn, Seoul, South Korea

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2010年 / 45卷 / 12期

关键词：

Adaptive equalizers; limiting amplifiers; negative impedance compensation; optoelectronic integrated circuits; silicon photodiodes; slope detection; transimpedance amplifiers; OPTICAL RECEIVER; TRANSIMPEDANCE AMPLIFIER; LIMITING AMPLIFIER; STANDARD CMOS; PHOTODIODE;

D O I：

10.1109/JSSC.2010.2077050

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An 8.5-Gb/s single-chip optoelectronic integrated circuit (OEIC) for short-distance optical communications is realized in a 0.13-mu m CMOS process. The OEIC consists of an on-chip silicon photodiode, a transimpedance amplifier with modified regulated cascode input configuration, an adaptive equalizer based upon slope-detection algorithm, and a limiting amplifier with merged negative impedance circuits. The proposed slope-detection adaptive equalizer compensates the limited bandwidth and the temperature variation of the integrated silicon photodiode. Measured results demonstrate 120-dB Omega transimpedance gain, 5.9-GHz bandwidth, -3.2-dBm optical sensitivity for 10(-12) BER, and 47-mW power dissipation from a single 1.5-V supply. The OEIC chip core occupies the area of 0.1 mm(2).

引用

页码：2861 / 2873

页数：13

共 38 条

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