Implementing evolution of FIR-filters efficiently in an FPGA

被引:0
|
作者
Vinger, KA [1 ]
Torresen, J [1 ]
机构
[1] Univ Oslo, Dept Informat, N-0316 Oslo, Norway
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Reconfigurable hardware devices make it possible to change the topology of electronic circuits at runtime. Using reconfigurable devices as a platform for Evolvable hardware (EHW) is well suited for real-time adaptive systems. This paper contains a novel approach on how to evolve the parameters for an adaptive digital filter. Both the filter as well as the evolution is implemented in a single Field programmable gate array (FPGA). The circuit is based on context-switching in FPGA-devices and preliminary results indicate a compact hardware as well as fast adaptation.
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页码:26 / 29
页数:4
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