Implementation of an FPGA-based DCDS video processor for CCD imaging

被引：2
|
作者：
Tulloch, Simon [1 ]
机构：
[1] European Southern Observ, Karl Schwarzschild Str 2, D-85748 Munich, Germany
来源：
HIGH ENERGY, OPTICAL, AND INFRARED DETECTORS FOR ASTRONOMY VII | 2016年 / 9915卷
关键词：
DCDS; CCD; FPGA; Video Processor;
D O I：
10.1117/12.2240405
中图分类号：
P1 [天文学];
学科分类号：
0704 ;
摘要：
Noise modeling of an E2V CCD231 suggested that a weighted double correlated sampler (DCDS) processor could offer small noise improvements at low pixel rates. The model was used to produce synthetic video waveforms that were then processed at various ADC frequencies and analogue bandwidths to identify the best weighting strategy and preamplifier design. An FPGA-based DCDS controller was then built, first to measure the actual CCD noise spectrum and then to verify the earlier theoretical results.
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收藏
页数：17
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