Efficient logic architectures for CMOL nanoelectronic circuits

被引：9

作者：

Dong, C. ^{[1
]}

Wang, W. ^{[1
]}

Haruehanroengra, S. ^{[1
]}

机构：

[1] Indiana Univ Purdue Univ, Dept Elect & Comp Engn, Indianapolis, IN 46202 USA

来源：

MICRO & NANO LETTERS | 2006年 / 1卷 / 02期

关键词：

D O I：

10.1049/mnl:20065005

中图分类号：

TB3 [工程材料学];

学科分类号：

0805 ; 080502 ;

摘要：

CMOS molecular (CMOL) circuits promise great opportunities for future hybrid nano-scale IC implementation. Two new CMOL building blocks using transmission gates have been introduced to obtain efficient combinational and sequential logic for CMOL designs. Compared with the existing CMOL circuits, the proposed CMOL designs based on these blocks can achieve more than 30% improvement in speed and up to 80% improvement in density and power consumption while providing similar fault tolerance capabilities. This work significantly advances the applications of CMOL to actual electronic circuits and systems.

引用

页码：74 / 78

页数：5

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