Gate controlled magnetoresistance in a silicon metal-oxide-semiconductor field-effect-transistor

被引:11
|
作者
Ciccarelli, C. [1 ]
Park, B. G. [2 ]
Ogawa, S. [2 ]
Ferguson, A. J. [1 ]
Wunderlich, J. [2 ,3 ]
机构
[1] Univ Cambridge, Cavendish Lab, Cambridge CB3 0HE, England
[2] Hitachi Cambridge Lab, Cambridge CB3 0HE, England
[3] Acad Sci Czech Republic, Inst Phys, VVI, Prague 16253 6, Czech Republic
关键词
CHARGE-LIMITED CURRENTS;
D O I
10.1063/1.3475771
中图分类号
O59 [应用物理学];
学科分类号
摘要
We present a study of the magnetoresistance (MR) of a Si metal-oxide-semiconductor field-effect-transistor (MOSFET) at the break-down regime when a magnetic field is applied perpendicular to the plane of the device. We have identified two different regimes where we observe a large and gate-voltage dependent MR. We suggest two different mechanisms which can explain the observed high MR. Moreover, we have studied how the MR of the MOSFET scales with the dimensions of the channel for gate voltages below the threshold. We observed a decrease in the MR by two orders of magnitude by reducing the dimensions of the channel from 50x280 mu m(2) to 5x5 mu m(2). (C) 2010 American Institute of Physics. [doi: 10.1063/1.3475771]
引用
收藏
页数:3
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