Design of single and multiple zone junction termination extension structures for SiC power devices

被引：58

作者：

Sheridan, DC ^{[1
]}

Niu, GF ^{[1
]}

Cressler, JD ^{[1
]}

机构：

[1] Auburn Univ, Alabama Microelect Sci & Technol Ctr, Dept Elect & Comp Engn, Auburn, AL 36849 USA

来源：

SOLID-STATE ELECTRONICS | 2001年 / 45卷 / 09期

基金：

美国国家航空航天局;

关键词：

SiC; edge termination; junction termination extension; breakdown; simulation;

D O I：

10.1016/S0038-1101(01)00052-1

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The design of SiC planar and non-planar junction termination extension (JTE) structures are investigated through calibrated quasi-3D numerical simulation. JTE techniques are optimized with respect to breakdown voltage, area consumption, surface fields, and interface charge. Simulated JTE charge profiles predict near-ideal breakdown values with surface fields less than 60% of their bulk values, and show that the critical implant activation percentage can vary as much as 40%, with only 10% reduction in breakdown voltage for lightly doped blocking layers. These results are extended to unique multiple-zone JTE and mesa-JTE structures applicable to a wide range of planar and non-planar SiC power devices. (C) 2001 Published by Elsevier Science Ltd.

引用

页码：1659 / 1664

页数：6

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