LETAM: A low energy truncation-based approximate multiplier

被引：32

作者：

Vahdat, Shaghayegh ^{[1
]}

Kamal, Mehdi ^{[1
,2
]}

Afzali-Kusha, Ali ^{[1
]}

Pedram, Massoud ^{[3
]}

机构：

[1] Univ Tehran, Sch Elect & Comp Engn, Tehran, Iran

[2] Inst Res Fundamental Sci, Sch Comp Sci, Tehran, Iran

[3] Univ Southern Calif, Dept Elect Engn, Los Angeles, CA 90089 USA

来源：

COMPUTERS & ELECTRICAL ENGINEERING | 2017年 / 63卷

基金：

美国国家科学基金会;

关键词：

Approximate multiplier; Truncating; Low power; Energy efficient; JPEG encoder; BINARY LOGARITHMS;

D O I：

10.1016/j.compeleceng.2017.08.019

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper, we propose an energy efficient approximate multiplier design obtained by truncating the input operands. In the structure, the n-bit multiplication operation is transformed to a smaller bit length multiplication plus some add and shift operations. The simple calculation core makes the multiplier a scalable yet low power structure. Also, we suggest an output quality-tunable multiplier providing ability to change the output quality during the multiplication operation. The characteristics of the proposed multiplier are compared with those of the exact and some other approximate multipliers in a 45 nm technology. The comparison reveals an average improvement of 89.2% (74.9%) in terms of the energy (area) compared to that of the exact multiplier. The utility of the proposed multiplier in a JPEG encoder application is also investigated. The results reveal that the Peak Signal to Noise Ratio (PSNR) reduction is at most 0.15 dB compared to that of the exact one. (C) 2017 Elsevier Ltd. All rights reserved.

引用

页码：1 / 17

页数：17

共 23 条

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[Anonymous], P 19 INT S VLSI DES

[2]

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