VLSI Design a Four Quadrant Analog Voltage-Mode Multiplier and Its Application

被引：0
|
作者：
Tijare, Ankita [1 ]
Dalchole, Pravin [1 ]
机构：
[1] Yeshwantrao Chavan Coll Engn, Nagpur, Maharashtra, India
来源：
INFORMATION AND COMMUNICATION TECHNOLOGIES | 2010年 / 101卷
关键词：
Voltage Mode; Multiplier; Low power;
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A new CMOS voltage-mode Four-quadrant analog Multiplier is proposed and analyzed. By applying inputs signals to set of complementary diode pair connection & to that of voltage difference circuit. The circuit is formed by cascading the complementary diode pair connection with the voltage difference circuit. Based on the proposed multiplier circuit, a low voltage high performance CMOS four quadrant analog multiplier is designed and fabricated by using 0.35micron technology. The measured 3dB bandwidth is 15 MHz Simple structure, low-voltage, low power, and high performance makes the proposed multiplier quite feasible in many applications.
引用
收藏
页码：50 / 54
页数：5
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