Defects and contamination in microelectronic device production: State-of-the-art and prospects

The control of tolerable levels of crystalline defects and metal contamination is a permanent challenge and task in the mass production of microelectronic devices to achieve economic yields and appropriate device reliability. Prominent factors contributing to the formation of crystalline defects during wafer processing are described for examples of typical defects which may occur as long as processes are not optimized: e.g., dislocations at trenches, implantation-induced stacking faults, metal silicide precipitates and tungsten wormholes. Their harmful effects on device performance, their formation mechanisms and precautions of their prevention are discussed. Aspects of metal contamination monitoring and trends in material specifications covering contamination issues will be briefly addressed.