From MOSFET matching test structures to matching data utilization: Not an ordinary task

被引：2

作者：

Cathignol, Augustin ^{[1
,2
]}

Bordez, Samuel ^{[1
]}

Rochereau, Krysten ^{[3
]}

Ghibaudo, Gerard ^{[2
]}

机构：

[1] STMicroelect, 850 Rue Jean Monnet, F-38926 Crolles, France

[2] INPG, IMEP, Minatec, F-38016 Grenoble, France

[3] NXP Semicond, F-38926 Crolles, France

来源：

2007 IEEE INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES, PROCEEDINGS | 2007年

关键词：

D O I：

10.1109/ICMTS.2007.374490

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Delivering mismatch data that reflect design reality is a real challenge. Indeed, from test structures to final data utilization, many steps can be the source of distortion. The first possible source of distortion is linked to the differences in terms of environment and spacing that might exist between test structure transistors and circuit transistors. The second potential source of distortion is related to the measurements and extraction that can both add extra mismatch. Finally, the data treatment and utilization can constitute other error sources. In this paper, thanks to results from various test structures and device types, the main sources of distortion are pointed out in order to help to set up a reliable chain from matching test structures to matching data utilization.

引用

页码：230 / +

页数：2

共 7 条

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